Tagged: coherent sdr cahannels

Coherent multi-channel SDR receiver

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[Coherent multi-channel SDR receiver with coherently sampling SDR hardware development platform]

Coherently sampling hardware architecture

The DRU-244A digitizer hardware contains 4 Analog-to-Digital Converter (ADC) chips connected to a common sampling clock source. The output of the ADCs is routed to the on-board Field-Programmable Gate Array (FPGA) through Digital Signal Processors (DSPs), which contain four Digital Down Converters (DDCs). The decimated samples are routed to the host PC via the PCI bus. On of the main features of the DRU-244A hardware is that all of the sampling and decimation is phase coherent and synchronous. The sampling clocks and even the start of the DDCs are synchronized employing trigger signals implemented in hardware. The samples can be kept in sync within the SRM-3000 SDR receiver software by explicitly turning on this feature on the control panel.

Proving the coherent operation with off-line processing

Signal connections

In this experiment, we’ve used a passive or resistive power splitter to provide the signals for each of the RF inputs of the digitizer card. As a first step, each RF input was connected with cables of the same length to the splitter. Later 8 m of RG-223 coaxial cable was inserted in one of the signal paths to add phase shift to one of the channels.

Testing coherent SDR channels with zero deg splitter
Testing coherent SDR channels with zero deg splitter
Testing coherent SDR channels with delay in one input
Testing coherent SDR channels with delay on one input

During the tests we’ve used three test frequencies 4.5 MHz, 9.4 MHz, and 16.1 MHz. The receiver was tuned to the given signal in USB operation mode and generated a ~1 kHz sine wave at the audio output.

Recording coherent channels

One can easily record a channel’s audio output in the SRM-3000 SDR radio software to an (almost) standard wave file, which then may be processed off-line using other tools. In the following examples, we’ve used the Matlab environment to display the time domain wave form and to calculate the power spectra and phase information of signals. As mentioned above, in order to make coherent SDR channel recordings, the user has to explicitly turn on the synchronous recording mode on the user interface.

Switch coherent recording in SRM SDR receiver
Turning on coherent recording in the SRM SDR receiver

We’ve made recordings for only the first channels of each DDC block. As a reminder, the DRU-244A SDR receiver platform actually contains four dedicated hardware DDCs in each signal processor. It has one wide band signal input, so, it makes sense to record only one of the output channels, as the phase delay will be the same for the rest of the channels of the same DSP.

The internal architecture of the coherent SDR hardware
The internal architecture of the coherent SDR hardware

Initial calibration results

The output was recorded to a wave file, and subsequently read into Matlab to display the time domain. Not surprisingly, we see the four (noisy) sine waves with no phase difference among them.

Coherent SDR channels with zero deg at 16.1MHz
Coherent SDR channels with zero deg at 16.1 MHz
Coherent SDR channels with zero deg at 9.4MHz
Coherent SDR channels with zero deg at 9.4 MHz
Coherent SDR channels with zero deg at 4.5MHz
Coherent SDR channels with zero deg at 4.5 MHz

Signals with phase delays

As the next step, we’ve inserted an 8 m RG-223 coax cable into one of the signal paths. The phase delay of the cable is frequency dependent. The calculated phase delays follow for the frequencies at hand:
4.5 MHz – 65.44 deg
9.4 MHz – 136.71 deg
16.1 MHz – 234.15 deg
* Zo = 50 ohm, C=101 pF/m, Z0=SQRT(L/C), t=SQRT(L*C)
* PH=360*F[Hz]*L[m]*t[s], t=5.05 ns/m

Coherent SDR channels with 234 deg at 16.1MHz
Coherent SDR channels with 234 deg at 16.1 MHz
Coherent SDR channels with 136 deg at 9.4MHz
Coherent SDR channels with 136 deg at 9.4 MHz
Coherent SDR channels with 65 deg at 4.5MHz
Coherent SDR channels with 65 deg at 4.5 MHz

Frequency domain phase delay processing

It is very hard to observe phase delay in time domain, thus, we’ve employed frequency domain calculations as well for the delay. The complex spectrum of the input signal was calculated with FFT. It contained the amplitude and the phase of each signal. We can get the phase difference between the different signal paths by subtracting the calculated phases.
As we can see on the figures, the phase differences give the same value as the previously calculated estimates.

Amplitude and phase difference spectrum of coherent SDR channels 4.5MHz Amplitude and phase difference spectrum of coherent SDR channels at 4.5 MHz Amplitude and phase difference spectrum of coherent SDR channels 4.5MHz (zoom) Amplitude and phase difference spectrum of coherent SDR channels at 4.5 MHz (zoom)
Amplitude and phase difference spectrum of coherent SDR channels 9.4MHz (zoom) Amplitude and phase difference spectrum of coherent SDR channels at 9.4 MHz (zoom) Amplitude and phase difference spectrum of coherent SDR channels 16.1MHz (zoom) Amplitude and phase difference spectrum of coherent SDR channels at 16.1 MHz (zoom)

Conclusion

The Quadrus SDR receiver platform – including the DRU-244A digitizer card and the SRM-3000 SDR receiver software – are ready to provide phase coherent signals. This platform feature makes it possible to use it in interferometric direction finding and digital beam forming applications. It is possible to record signals as standard windows wave files for off-line processing.

Downloads related to this content: Phase coherent SDR cahnnel records with read script (Matlab) Share Quadrus SDR
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